The present invention relates to a semiconductor device and, more particularly, to a technique effective when applied to a semiconductor device including a DC-DC converter.
In recent years, in order to achieve the reduction in size and the high-speed response of a power source circuit etc., the frequency of a power MOS•FET (Metal Oxide Semiconductor Field Effect Transistor) to be used in a power source circuit is increased.
In particular, the current and frequency of a CPU or DSP of a personal computer of desktop or notebook type, server, gaming machine, etc., tend to increase. Because of this, a power MOS•FET constituting a non-insulating DC-DC converter that controls the power source of the CPU (Central Processing Unit) and DSP (Digital Signal Processor) is being developed to achieve a technique capable of coping with large currents and high frequencies.
A DC-DC converter widely used as an example of a power source circuit has a configuration in which a power MOS•FET for a high-side switch and a power MOS•FET for a low-side switch are connected in series. The power MOS•FET for a high-side switch has a switch function for controlling a DC-DC converter and the power MOS•FET for a low-side switch has a switch function for synchronous rectification and the voltage of the power source is converted by alternately turning on/off these two power MOS•FETs in synchronization with each other.
In Japanese patent laid-open No. 2007-266218 (patent document 1), a technique relating to a semiconductor device is described, in which a semiconductor chip having a power MOS•FET for a high-side switch formed, a semiconductor chip having a power MOS•FET for a low-side switch formed, and a semiconductor chip having a control circuit formed that controls their operations are included in one package.